Publications

We present an information infrastructure for con-ducting massively parallel cancer cell culture assays. We demonstrate basic features of the proposed framework, namely, a set of in situ sensing capabilities based on a CMOS capacitance-sensing lab-on-a-chip platform (termed lab-on-CMOS, or LoCMOS), a customized database schema to allow numerous multimodal data streams, and a signal processing core for interpreting and visualizing cell culture data. For instance, we feature results showing that measured capacitance time series data correlate highly with visual cell coverage data, suggesting that either modality may be used with high-fidelity to estimate the degree of proliferation of the cell culture. We feature several services that may be used to interpret real-time capacitance data and real-time optical microscopy data.

Pulsed Time-of-Flight (ToF) LiDAR is a crucial technology for acquiring depth information in various applications, including autonomous vehicles, robotics, and 3D mapping. Single-Photon Avalanche Diodes (SPADs) are widely employed as detectors in these systems due to their fast response and high sensitivity. This paper investigates pulsed ToF LiDAR-based depth imaging to clarify the hardware design considerations that affect depth estimation accuracy. We present a simulation study that investigates the performance of SPAD-based LiDAR systems under various conditions, offering insights into the design of SPAD circuits for improved depth imaging performance. We find that, as expected, accuracy and depth resolution depend strongly on the fill factor, with accuracy decreasing as the fill factor drops, gradually at first and then more steeply for fill characteristics of less than 50%. Lastly, we discuss the outcomes of our simulations and suggest directions for future research in this area.

An emerging modality in cancer treatment is tumor treating fields (TTF). It consists of electric fields of approximately 1 V RMS /cm in strength and of around 200 kHz in frequency. When these fields are aligned with a cancer cell's mitotic spindle, they can impede cell division. This method has improved overall patient survival in glioblastoma patients, remarkably with limited side effects. However there are still many unknowns associated with this therapy. Thus, to assist the discovery effort and facilitate further studies, we previously designed and successfully tested an in vitro integrated capacitance sensing TTF microsystem for autonomous and label-free detection of the effect TTFs on breast cancer cells. Herein, we propose an update to the microsystem's electrode geometry. Our novel approach eases the trade-offs between size, material usage, and consistency of treatment. Based on simulation studies and a physical model, we show that the new approach reduced an applied field's magnitude variance by 63% and angle variance by 54%. These gains should translate to improved repeatability, looser manufacturing tolerances, and smaller designs.

We report on a novel microsystem for assessing the effects of tumor treating fields on cancer cells. The platform features at its core an integrated capacitance sensor fabricated in a 0.35μm CMOS process. The device also includes a cell culture well and miniaturized electrodes for generating arbitrary TTField spatial patterns. The measured capacitance data show a clear distinction between cell cultures treated with TTFields relative to those that remain unexposed. The proposed approach provides an inexpensive, real-time, and label-free means to conduct mechanistic TTField studies in vitro.

This work features a novel capacitance biosensor for characterizing DNA origami. The biosensor was fabricated in a 0.18 μm CMOS process, and it consisted of an 8 × 8 array of passivated interdigitated electrodes where each electrode is coupled to a dedicated capacitance-to-frequency conversion circuit. We further show a self-referencing data acquisition scheme for reducing the variance in DNA origami measurements.

We report a novel method for increasing the number of challenge-response pairs (CRPs) of a physically unclonable function (PUF) implemented using a 64 × 64 perimeter-gated single-photon avalanche diode (pg-SPAD) imager fabricated in a 0.35 µm CMOS process. We found that reconfiguring the PUF using perimeter gating enhanced the CRP space while maintaining temperature resiliency. We used the imagers' spatial dark count variation as the PUF and pixel addresses as an explicit challenge. Further, we used a set of perimeter gate voltages as an implicit challenge to alter the pixels' dark count response depending on their positions in the explicit challenge vector. The resulting variation in dark count response for different permutations of the same set of pixels yielded an increase in the size of the space of possible CRPs that can be used with the PUF.

In this paper we investigated the spectral responsivity and photoresponse non-uniformity (PRNU) of a perimeter-gated single-photon avalanche diode (pg-SPAD) imager fabricated in a 0.35 µm complementary metal-oxide semiconductor (CMOS) process. Our experimental results show that perimeter gating reduces the imager's mean room temperature dark count rate (DCR) by two orders of magnitude and that it expands pixel spectral responsivity over the visible range. Further, our results show that the PRNU's dependence on noise is significantly reduced in high perimeter gate voltage regimes.

We report a novel hardware method for generating authentication keys based on a physically unclonable function (PUF) of a perimeter-gated single photon avalanche diode (pg-SPAD) imager. We tested three 64×64 pg-SPAD imagers over a temperature range extending from 27°C to 75°C and demonstrated that authentication keys can be generated with quantifiable difference and that they are resilient to temperature change. We used the imager's spatial dark count variation as a PUF, i.e., as a means to generate unique hardware fingerprints on which the keys are based. Without applying complex key generation algorithms or temperature compensation techniques, we obtained approximately 0.1 in average normalized Hamming distance (nHD) between intra-chip keys generated from the same challenge and approximately 0.5 in average nHD between intra-chip keys generated from different challenges. Inter-chip keys generated with the same challenge also showed sufficient differentiation, i.e., a nHD of approximately 0.5. Additionally, we demonstrate that perimeter gating offers an additional security feature as it can either alter or obfuscate the imager's PUF.

We report on a perimeter-gated single-photon avalanche diode (pg-SPAD) imager fabricated in a 0.35 μm CMOS process. The imager had 4,096 pixels disposed in a two-dimensional array ( 64×64 ) and peripheral circuitry for pixel access and readout. We demonstrate that the room temperature probability of a dark count occurring at a single pixel vanishes when perimeter gating is used. We further demonstrate that the array-wide noise variance decreases with an increase in perimeter gate voltage magnitude. The proposed imager architecture lays the foundation for single-photon imaging with negligible dark signal non-uniformity (DSNU).

“Fail often to succeed sooner” is a common mantra that we are told is the secret to success. When reporting research results, however, scholars rarely write about their failed attempts and only focus on the successful ones. Perhaps the source of this disconnect between what we preach and what we do can be found in the underlying assumption that published work is meant to move the field forward and failed attempts supposedly do not. The goal of the confessions presented in this paper is to show that even failed attempts are genuine and valuable contributions to our field provided that we learn from our mistakes and correct them. The 27 confessions span from planning oversights, digital and analog design errors, misunderstanding of devices, overlooked parasitics, LVS errors, and troubles in testing.

We describe a capacitance sensor system-on-chip that has been incorporated into a lab-on-CMOS system for applications in monitoring cell viability. This paper presents system-level improvements to a capacitance sensor array that include programmable gain, active pixel settings, and serial bus addresses, while at the same time minimizing external bonding requirements towards developing a point-of-care device. Results from benchtop experiments are presented using dry flour to mimic for cell coverage, and show a change of up to 35 kHz. Estimation of electrode coverage is obtained using concurrent time-lapse imaging of the sensor surface which is then correlated to the sensor readings.

Integrating CMOS sensor chips to allow for wet experimentation on lab-on-CMOS devices is a challenging task. In this paper we describe a chip packaging method that will allow for simple integration and handling of small integrated circuit (IC) chips. A chip is embedded in an epoxy handle wafer to allow for photolithographic processing. Electrical connections are provided by a sputter-deposited copper layer and an electroplated nickel layer. Passivation was performed using a second epoxy layer. The process was evaluated by packaging a capacitance sensor chip and performing live cell culture experiments with package cleaning and reuse. Results showed good structural reliability in three repeated experiments over five cumulative days, with no adverse effects on the viability of cells.

Cybersecurity, as it relates to hardware for the electric grid and to novel smart grid technologies, is an important component of the innovation cycle. We will explore intellectual property strategies that may promote entrepreneurial activities and spur innovations that reduce the electric grid's current vulnerabilities. We will identify areas in which stakeholders such as U.S. policy makers, the United States Patent and Trademark Office (USPTO), the business community, and the academic community, can collaborate to foster growth and innovation.

This paper investigates the near-breakdown spectral responsivity of perimeter-gated single-photon avalanche diodes (SPADs). We report, for the first time, the effects of perimeter gating on spectral responsivity. Further, we describe a detailed experimental procedure for measuring spectral response. Our investigation reveals that perimeter gating strongly influences spectral responsivity by broadening the response over the visible range, confirming that perimeter gating activates the volumetric junction of the measured devices.

Capacitance sensing is an emerging technology for monitoring cell viability. This work extends a previously developed sensor that measured capacitive loading by cells on the oscillation frequency of a current-starved ring oscillator and converted the frequency to a digital value by counting oscillation cycles. The new sensor array has been developed into a one-chip lab-on-CMOS system with integrated temperature sensors, serial readout to an external microcontroller using an Inter-Integrated Circuit (I2C) bus, and automatic scanning to allow for autonomous data collection. To allow sensing at the required aF levels, the system was realized on single chip to reduce the baseline capacitance, and long counting times were employed. The I2C module was moved to the edge of the chip prevent exposing cells to unacceptably high temperatures during viability studies.

We report a Single Photon Avalanche Diode (SPAD) in standard CMOS with a physical implementation that offers high fill factor and very low Dark Count Rate (DCR). The demonstrated suppression of the Dark Count is achieved through alterations made to the structure of the SPAD without any modifications in the fabrication process. The structure of the device consists of a perimeter gated junction with a geometrical profile that is tailored for high gettering efficiency. We previously demonstrated DCR of 20 KHz for a 50 μm diameter perimeter gated circular SPAD (2 orders of magnitude DCR reduction). Using our current design we report DCRs of 10 Hz for a 1200 μm 2 SPAD operated at an excess bias of up to 1V. The reported DCRs are obtained for SPADs fabricated in single-well standard CMOS and operated at room temperature.

People rarely put in their papers the things that didn't work, the mistakes they made, and how they found out what went wrong. Such confessions can help others learn how to avoid similar mistakes. Twenty-six confessions were collected to form the bulk of this paper. Themes that arise are errors that result from not understanding the limitations of simulation tools in modeling physical reality, chip verification errors that result from lack of clear communication between designers, and projects that are considered in their own isolated environment of technical challenges rather than the broader context of their environment or application.

Silicon carbide has attracted a lot interest in the power electronics arena due to its advantageous properties over other semiconductor materials; it has high thermal conductivity, a wide bandgap, and a high breakdown electric field, all of which are properties that make it suitable for high voltage and high current density devices capable of operating in extremely harsh environments. Another noted advantage of SiC is its capability to transduce photons in the ultraviolet band of the electromagnetic spectrum. Due to the large energy gap, SiC p-n junctions exhibit high UV responsivity and negligible response beyond 400 nm. This makes SiC ideal for solar-blind UV imaging, and as a result there has been significant efforts towards optimizing the performance of SiC avalanche photodiodes (APDs).

We report experimental results from a single-photon avalanche diode (SPAD) structure fabricated in a standard 0.5 μm single-well CMOS process. The diode consists of a p+/n-well junction, and its multiplication region is surrounded by a diffused guard-ring obtained through lateral diffusion of closely spaced n-wells. Moreover, a poly-silicon gate is placed over the junction's perimeter. These mechanisms help in curtailing perimeter breakdown, as has been previously reported. In this work, we study their combined effect on the junction's breakdown voltage, and on the dark count rate when the avalanche diode is operated in Geiger mode. Our results show that the poly-silicon gate and the diffused guard ring both increase the breakdown voltage with roughly similar efficacy. Furthermore, our results reveal that the dark count rate (DCR) is reduced by a factor of 7 when the gate potential is decreased below -16 V, indicating that the surface regions depleted by the field not only help in preventing edge breakdown but also contribute in reducing the device's noise floor.

We investigate the design, fabrication and numerical modeling details of a silicon impact ionization device that was implemented in a standard single-well CMOS process line for use in biomedical applications. Device performance modeling of the perimeter-gated silicon avalanche diode is presented. To lower dark current, tune the current multiplication rate, and change the breakdown voltage, two techniques were develop: First is laying out n-wells close to each other to favorably increase spatial aliasing of diffused dopants, and second is using a gate terminal at the perimeter to modify electric field in the vicinity of the p+-n junction. Results verified by calculations and simulations show that the device can be operated in photon-counter mode with high breakdown voltages and sharp current transitions or in current multiplication mode as in solid-state impact ionization multipliers.

We report on several techniques that have been pursued in our laboratories for packaging complementary metal-oxide semiconductor (CMOS) sensors for use in biological environments, such as cell medium. These techniques are suited for single CMOS die ranging from 1.5 × 1.5 mm2 to 3 × 3 mm2 in area. The first method consisted of creating high aspect ratio structures from negative-tone photocurable resins to simultaneously encapsulate wirebonds from the chip to a ceramic package and create a cell culture well. The second technique used a photolithographically defined barrier on the die to allow the use of non-photocurable resins as encapsulants. The third method consisted of re-routing the die padframe using photolithographically defined, planar leads to a much larger padframe; this will allow the chip to be integrated with microfluidic networks. Finally, we show a method in which the encapsulant was also used as an optical filter and as a base for integrating more complex structures.

We demonstrate the application of a handheld fluorometer optimized for UV excitable assays. We demonstrate the measurement of metabolic products as yeast cells germinate in dextrose solution. In particular we measure NADH which is produced during cellular respiration. The handheld fluorometer consists of a CMOS active pixel sensor with in-pixel CDS, coupled with a custom chromophore-polymer emission Alter and a UV LED as the excitation source. The handheld fluorometer is able to detect as little as 10 muM of NADH, and in its present format should be applicable to any fluorescence assay with UV excitation and visible emission wavelengths.

A method is presented to improve the energy resolution of scintillators read out with Geiger-mode avalanche photodiode arrays. The method employs digital signal processing, in which individual decay curves for gamma-ray detection events are digitized and then fitted to analytical functions whose amplitude provides energy information. Simulation studies suggest that after-pulses represent the largest source of energy resolution loss, which can be improved with curve-fitting. An experimental measurement confirmed that energy resolution could be improved with least-square curve-fits to a simple exponential model.

Objectives: Solid-state radiation detectors have advantages of size and low voltage, but often suffer from noise artifacts. We sought to develop flexible readout methods to improve signal-to-noise ratio (SNR) for such detectors.

Methods: Readout strategies were evaluated for increasing signal-to-noise ratios in circuits intended for active-pixel-sensor (APS) detectors (e.g., as in Medipix arrays). An additional amplifier element was inserted into the traditional three-transistor integration circuit, in order to decouple the intrinsic capacitance of the radiation detector from the charging capacitor. SNR from the resulting circuit was compared to traditional APS integrating circuits during exposure to x-rays with 75-keV peak energy.

Results: Experimental measurements demonstrated approximately ten-fold improvement in SNR for the four-transistor integration circuit as compared to traditional APS systems.

Conclusions: Signal-to-noise ratio for solid-state radiation detectors can be improved through additional pixel-based amplifier stages.

We report the development of a handheld fluorometer for UV excitable fluorescence assays. The handheld detector serves as a demonstration platform for an integrated fluorescence sensor and comprises a CMOS detector coated with a polymer based optical filter and placed in close proximity to a UV LED which is used as an excitation source. The sensor function has been validated for metabolic activity and cytotoxicity assays. The fluorometer was able to determine NADH concentration as low as 17 μM and was able to track NADH production in live yeast cells over time and as the yeast cell concentration varied. The sensor was also used to discriminate the viability of human intestinal adenocarcinoma cells (Caco-2 cell line) using a live/dead stain after exposure to toxic and benign nanoparticles. The integrated fluorescence sensor is suitable for microscale fluorescence detection in lab-on-a-chip applications.

Cell-based sensors are being developed to harness the specificity and sensitivity of biological systems for sensing applications, from odor detection to pathogen classification. These integrated systems consist of CMOS chips containing sensors and circuitry onto which microstructures have been fabricated to transport, contain, and nurture the cells. The structures for confining the cells are micro-vials that can be opened and closed using polypyrrole bilayer actuators. The system integration issues and advances involved in the fabrication and operation of the actuators are described.

This paper reports a novel integrated circuit for fluorescence sensing. The circuit implements a differential readout architecture in order to reduce the overall noise figure. The circuit has been fabricated in a commercially available 0.5 μ m CMOS technology. Preliminary results show that the reset noise is reduced by a factor of 1.42 and the readout noise by a factor of 9.20 when the pixel is operated in differential mode versus single-ended mode. Spectral responsivity characteristics show that the photodiodes are most sensitive at 480 nm. Using a commercially available emission filter, the sensor was able to reliably detect a concentration of Fura-2 as low as 39 nM. The sensor was used to perform ratiometric measurements and was able to reliably detect a free calcium concentration of 17 nM.

Objectives: Pre-surgical assessments are of limited benefit when the anatomy is likely to change as a result of interventional procedures. Non-imaging assessments (i.e., probes) are useful in high-contrast surgical cases (e.g., sentinel nodes), but are less useful in discriminating tumor from background tissues. We sought a technical solution capable of providing molecular images to surgeons in real-time, and with OR-friendly properties: low voltage, intuitive registration to features within the operative site, and single-use application. Methods: Compact PET detector assemblies were mounted on three fingers of an operator’s hand. Each PET detector assembly consists of two-dimensional arrays of Cerium-doped LuAG pillars (Crytur Inc., Czech Republic) mounted on quantum photodetectors (“silicon photomultipliers”) biased at approximately 35 volts. Electromagnetic position sensors are embedded in the PET detector assemblies, and read out with a motion tracking system (Northern Digital Incorporated, Waterloo, ON). Data is acquired with sampling analog-to-digital converters (National Instruments, Austin, TX), and displayed using a graphical user interface (GUI) based on the Georgetown Image Guided Surgery Toolkit, which shows PET findings superimposed on a representation of the surgeon’s fingers. Results: Simulations showed that small structures in the volume subtended by the fingers would be visualized with high contrast. Experimentally, the LuAG/APD PET detectors 511 keV photopeak showed no measurable effect due to the electromagnetic pulses from the motion tracker. Conclusions: We present a new paradigm for surgical visualization, consisting of finger-mounted PET detectors, in which a model of the surgeon’s own fingers with superimposed PET findings serves as an intuitive registration tool. The low component cost suggests that single-use application (i.e., as a disposable PET glove) is feasible.

We report an improved design and successful demonstration of single photon avalanche diode (SPAD) detectors fabricated in a standard nwell 0.5 mum CMOS technology. The detectors are implemented as circular junctions between p+ and nwell regions. Two techniques are used to suppress perimeter breakdown: guard rings at the edges of the junctions, formed using lateral diffusion of adjacent nwell regions, and a poly-silicon control gate over the diffused guard rings and surrounding regions. The detectors exhibit a breakdown voltage of -16.85 V, ~4 V higher than simple diode structures in the same technology. The detector exhibits a thermal event rate of 16000 counts/s at room temperature at an excess bias voltage of 1.15 V.

A low noise optical sensor and biocompatible microscale optical filters for integrated fluorescence sensors were developed and tested. The sensor was fabricated in a 0.5 mum CMOS process. The measured reset noise of the sensor is reduced by a factor of 10 compared to conventional active pixel sensors. The transmission ratio in the pass-band and suppression ratio in the stop-band of the optical filters are comparable to that of macroscopic commercial filters for fluorescence microscopy

This book covers the latest trends in the design of single-photon avalanche diodes (SPADs), which are the front-end sensors in modern photon counting systems. The authors describe the fundamental physics that enable photon counting in these devices. They also discuss systems that are made from these detectors, specifically describing circuit architectures that may be used to achieve high-fidelity photon counting. Coverage features example devices and systems designed in the authors’ research groups as well as different approaches undertaken by other experts in the field.

The authors take a unique, modular approach that covers every aspect of the design stack, with stand-alone chapters, allowing readers to focus on specific aspects of the technology stack. Coverage includes the device-physics aspects of the detectors, their integration in modern electronics fabrication technologies like CMOS, and application-specific systems that utilize these detectors.

This chapter covers several CMOS-based architectures used in bioelectronics applications. We discuss the use of CMOS technology in the development of neural interfaces, including neurostimulators and neural recording amplifiers. We discuss techniques for ensuring charge balance to prevent tissue damage in neurostimulation, and we discuss several electrode configurations for neural recording. We also discuss a variety of CMOS biosensors. For example, we cover electrochemical sensors and their principle of operation, interfacial capacitance sensors, impedance sensors, and image sensors, all centered around state-of-the-art implementations that rely on CMOS circuits for sensing, transduction, and data processing at the front end.