We report an improved design and successful demonstration of single photon avalanche diode (SPAD) detectors fabricated in a standard nwell 0.5 mum CMOS technology. The detectors are implemented as circular junctions between p+ and nwell regions. Two techniques are used to suppress perimeter breakdown: guard rings at the edges of the junctions, formed using lateral diffusion of adjacent nwell regions, and a poly-silicon control gate over the diffused guard rings and surrounding regions. The detectors exhibit a breakdown voltage of -16.85 V, ~4 V higher than simple diode structures in the same technology. The detector exhibits a thermal event rate of 16000 counts/s at room temperature at an excess bias voltage of 1.15 V.