System-on-a-chip for automated cell assays using a lab-on-CMOS platform

System-on-a-Chip for Automated Cell Assays using a Lab-on-CMOS Platform

B. Senevirathna, S. Lu, N. Renegar, M. Dandin, E. Smela, and P. Abshire, “System-on-a-Chip for Automated Cell Assays using a Lab-on-CMOS Platform,” in 2019 IEEE International Symposium on Circuits and Systems (ISCAS), 2019, pp. 1-5. [Online Article]
System-on-a-chip for automated cell assays using a lab-on-CMOS platform

We describe a capacitance sensor system-on-chip that has been incorporated into a lab-on-CMOS system for applications in monitoring cell viability. This paper presents system-level improvements to a capacitance sensor array that include programmable gain, active pixel settings, and serial bus addresses, while at the same time minimizing external bonding requirements towards developing a point-of-care device. Results from benchtop experiments are presented using dry flour to mimic for cell coverage, and show a change of up to 35 kHz. Estimation of electrode coverage is obtained using concurrent time-lapse imaging of the sensor surface which is then correlated to the sensor readings.